Infinera’s PIC Challenge

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Although Infinera has always touted its unique Photonic Integrated Circuit (PIC) technology as a major differentiator in the optical systems market, any advantages to this approach in the past have perhaps been totally countered by its limitations. Even today, the vendor’s ties to PICs are leading to constraints in the Data Center Interconnect (DCI) space because it appears that it prevents the development of higher-density offerings in smaller form factors, which have been enabled through the use of Acacia Communications’ 400G chip set. Also, while the necessity for 64QAM is terribly far out into the future, we think it is possible that a plateau has been hit with Infinera not being able to go beyond 8QAM and 16QAM with Indium Phosphide-based componentry to achieve a single 400G channel or a 1-terabit PIC.

The major players providing long-haul transport systems are talking about moving to 64QAM to achieve higher data rates, and although, again, the need for high-volume production could easily be well beyond the foreseeable future, a practical road map (as opposed to a theoretical one) will be demanded by major customers. So today, Infinera is at 10×50 gigabaud with the present modulation technique, and instead of being able to go faster, the question surrounds whether it can really do 20 channels of 50 gigabaud on a PIC, and provide the same reliability that it has with 10 channels. It is not known whether Infinera would be able to pull it off with a decent yield, given the size, the number of components involved, as well as the defect density of InP.

It is interesting to note that over the years, Infinera’s management has downplayed the matter of yields on its fabs, which we have not found totally convincing. Of course, the classic semiconductor philosophy has tended to be that volume is all-important, and that a fab requires 90-plus percent output to just break even. Infinera has asserted that the “PIC is an enabler for cost structure elsewhere in the system, but it is not the dominant cost structure. We are not a component company.”

Nevertheless, it is quite clear that the development of Infinera’s Cloud Xpress (CX) for DCI applications was based heavily on improving the cost structure of its chips. The original version of the CX used the fallout from the DTN-X PICs, which did not meet the optical performance that is required for the latter, and the supplier was able to use them in the former. In addition, in deciding to support a long-haul version of the CX, the use of the high-performance PIC obviously resulted in less fallout, and because the yields are better, the price per total PICs has gone down compared to the levels of two years ago or so.

In returning to the mixed track record at best regarding Infinera going it alone with its PICs, we have discussed in the past that such a disruptive cost factor initially only resulted in the total interexchange business being cut by as much as a third because of the lack of growth in the space, combined with the other competitors having to match the lower prices to remain competitive. Moreover, because of cost reasons, the manufacturer ultimately had to decide to leapfrog 40G and move directly to 100G PICs, losing out on opportunities at the lower speed. Furthermore, in not offering an Open Line System (which hopefully, will at least partially turn out to be a blessing in disguise in the long-term), Infinera is no longer providing new deployments at a major hyperscale data center operator. (One would think that the proprietary aspects of the PICs would hardly facilitate an OLS arrangement.)

[written by Mark Lutkowitz]